Title :
A 300-MHz 115-W 32-b bipolar ECL microprocessor
Author :
Jouppi, Norman P. ; Boyle, Patrick ; Dion, Jeremy ; Doherty, Mary Jo ; Eustace, Alan ; Haddad, Ramsey W. ; Mayo, Robert ; Menon, Suresh ; Monier, Louis M. ; Stark, Don ; Turrini, Silvio ; Yang, Leon J. ; Hamburgen, William R. ; Fitch, John S. ; Kao, Russe
Author_Institution :
Western Res. Lab., Digital Equipment Corp., Palo Alto, CA, USA
fDate :
11/1/1993 12:00:00 AM
Abstract :
A full-custom single-chip bipolar ECL RISC microprocessor was implemented in a 1.0-μm single-poly bipolar technology. This research prototype contains a CPU and on-chip 2-KB instruction and 2-KB data caches. Worst-case power dissipation with a nominal -5.2 V supply is 115 W. The chip has been designed for a worst-case clock frequency of 275 MHz at a nominal supply. The chip verifies a new style of CAD tools developed during the design process, advanced packaging techniques for high-power microprocessors, and VLSI ECL circuit techniques
Keywords :
VLSI; bipolar integrated circuits; buffer storage; circuit CAD; emitter-coupled logic; microprocessor chips; packaging; reduced instruction set computing; -5.2 V; 1.0 micron; 115 W; 2 KB; 300 MHz; 32 bit; CAD tools; RISC; VLSI; advanced packaging techniques; bipolar ECL microprocessor; clock frequency; data caches; instruction caches; power dissipation; single-poly bipolar technology; Clocks; Design automation; Frequency; Microprocessors; Packaging; Power dissipation; Process design; Prototypes; Reduced instruction set computing; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
