DocumentCode :
973144
Title :
A general framework for vertex orderings with applications to circuit clustering
Author :
Alpert, Charles J. ; Kahng, Andrew B.
Author_Institution :
Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
Volume :
4
Issue :
2
fYear :
1996
fDate :
6/1/1996 12:00:00 AM
Firstpage :
240
Lastpage :
246
Abstract :
Vertex orderings have been successfully applied to problems in netlist clustering and for system partitioning and layout. We present a vertex ordering construction that encompasses most reasonable graph traversals. Two parameters-an attraction function and a window-provide the means for achieving various graph traversals and addressing particular clustering requirements. We then use dynamic programming to optimality split the vertex ordering into a multiway clustering. Our approach outperforms several clustering methods in the literature in terms of three distinct clustering objectives. The ordering construction, by itself, also outperforms existing graph ordering constructions for this application. Tuning our approach to "meta-objectives", particularly clustering for two-phase Fiduccia-Mattheyses bipartitioning, remains an open area of research.
Keywords :
VLSI; circuit CAD; dynamic programming; graph theory; integrated circuit design; VLSI CAD; attraction function; circuit clustering; dynamic programming; graph ordering constructions; graph traversals; multiway clustering; vertex orderings; window function; Bandwidth; Circuit optimization; Clustering methods; Design automation; Dynamic programming; Logic arrays; Simulated annealing; Sun; Symmetric matrices; Very large scale integration;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/92.502195
Filename :
502195
Link To Document :
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