DocumentCode :
973584
Title :
Performance evaluation and cache analysis of an ILP protocol implementation
Author :
Braun, Torsten ; Diot, Christophe
Author_Institution :
IBM Eur. Networking Center, Heidelberg, Germany
Volume :
4
Issue :
3
fYear :
1996
fDate :
6/1/1996 12:00:00 AM
Firstpage :
318
Lastpage :
330
Abstract :
Integrated layer processing (ILP) is an implementation concept that “permits the implementor the option of performing all the (data) manipulation steps in one or two integrated processing loops”. To estimate the achievable benefits of ILP, a file transfer application with an encryption function on top of a user-level TCP has been implemented and the performance of the application in terms of throughput and packet processing times has been measured. The results show that it is possible to obtain performance benefits by integrating marshalling, encryption, and TCP checksum calculation. The experiments yielded in a throughput gain of only 10-20% in contrast to the 50% gain achieved for simple loop experiments. Simulations of memory access and cache hit rate show that the main benefit of ILP is reduced memory access rather than an improved cache hit rate. ILP reduced the number of memory accesses up to 30% in the experiment, but the relative amount of cache misses could not be reduced compared to a carefully designed non-ILP implementation. The results also show that data manipulation characteristics may significantly influence the cache behavior and the achievable performance gain of ILP. Considering these results, ILP can only be recommended in cases where the the ILP loop consists of several, but very simple data manipulations without complex calculations over the data
Keywords :
cache storage; cryptography; data handling; performance evaluation; transport protocols; ILP protocol implementation; TCP checksum calculation; cache analysis; cache hit rate; data manipulation; data manipulation characteristics; encryption function; experiments; file transfer application; integrated layer processing; integrated processing loops; marshalling; memory access; packet processing time; performance evaluation; performance gain; throughput; user-level TCP; Access protocols; Cache memory; Cryptography; Humans; Performance analysis; Performance gain; Registers; Sun; Throughput; World Wide Web;
fLanguage :
English
Journal_Title :
Networking, IEEE/ACM Transactions on
Publisher :
ieee
ISSN :
1063-6692
Type :
jour
DOI :
10.1109/90.502231
Filename :
502231
Link To Document :
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