Title :
A Wide-Bandwidth 2.4 GHz ISM Band Fractional-N PLL With Adaptive Phase Noise Cancellation
Author :
Swaminathan, Ashok ; Wang, Kevin J. ; Galton, Ian
Author_Institution :
Univ. of California at San Diego, La Jolla
Abstract :
A fast-settling adaptive calibration technique is presented that makes phase noise cancelling DeltaSigma fractional-N PLLs practical for the low reference frequencies commonly used in wireless communication systems. The technique is demonstrated as an enabling component of a 2.4 GHz ISM band CMOS PLL IC with a 730 kHz bandwidth, a 12 MHz reference, and an on-chip loop filter. In addition to the adaptive calibration technique, the IC incorporates a dynamic charge pump biasing technique to reduce power dissipation. The worst-case phase noise of the IC is -101 dBc/Hz and -124 dBc/Hz at 100 kHz and 3 MHz offsets, respectively, and the adaptive phase noise cancellation technique has a worst-case settling time of 35 mus . The IC is implemented in 0.18 CMOS technology. It measures 2.2 x 22 mm2 and its core circuitry consumes 20.9 mA from a 1.8 V supply.
Keywords :
CMOS integrated circuits; calibration; phase locked loops; phase noise; radio networks; CMOS technology; DeltaSigma fractional-N PLL; ISM band fractional-N PLL; adaptive calibration technique; adaptive phase noise cancellation; bandwidth 2.4 GHz; dynamic charge pump biasing technique; on-chip loop filter; wireless communication systems; Bandwidth; CMOS integrated circuits; CMOS technology; Calibration; Charge pumps; Filters; Frequency; Phase locked loops; Phase noise; Wireless communication; CMOS analog integrated circuits; Calibration; phase-locked loops (PLLs);
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2007.908763