An analytical model for the determination of the transient response of CML and ECL gates

Author

Ghannam, Moustafa Y. ; Mertens, Robert P. ; Van Overstraeten, Roger J.

Author_Institution

Interuniv. Microelectron. Center, Leuven, Belgium

Volume

37

Issue

1

fYear

1990

fDate

1/1/1990 12:00:00 AM

Firstpage

191

Lastpage

201

Abstract

In the analysis, the full-range transient response of the gate is calculated using closed-form analytical expressions. This is achieved by generalizing and improving the method used by J.M.C. Stork (IEDM Tech. Dig., p.550, 1988) for the determination of the propagation delay. The proposed model is applicable at low-level injection, unity fan-in, and unity fan-out. The delays related to the transit time, the load, and the junction capacitances are considered. For ECL gates, the emitter follower delay is also included. Various delays (risetime, propagation delay, etc.) calculated using the proposed model agree perfectly with the results of SPICE computer simulations and with the reported experimental values

Keywords

delays; emitter-coupled logic; logic gates; transient response; CML gates; ECL gates; SPICE computer simulations; analytical model; closed-form analytical expressions; delays; emitter follower delay; junction capacitances; load; low-level injection; propagation delay; transient response; transit time; unity fan-in; unity fan-out; Analytical models; Capacitance; Computer simulation; Delay effects; Delay estimation; Integrated circuit modeling; Logic gates; Propagation delay; Transient response; Voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.43816

Filename

43816