Title :
Comparison of thermal-shunt and flip-chip HBT thermal impedances: comment on “Novel HBT with reduced thermal impedance”
Author :
Jenkins, T. ; Bozada, C. ; Dettmer, R. ; Sewell, J. ; Via, D. ; Barrette, J. ; Ebel, J. ; DeSalvo, G. ; Havasy, C. ; Liou, L. ; Quach, T. ; Gillespie, J. ; Pettiford, C. ; Ito, C. ; Nakano, K. ; Anholt, R.
Author_Institution :
Solid State Electron. Directorate, Wright Labs., Wright-Patterson AFB, OH, USA
fDate :
7/1/1996 12:00:00 AM
Abstract :
For the original article see ibid., vol. 5, no. 11, p. 373-5 (1995). As indicated in the aforementioned work, reducing thermal impedance is a key to increasing heterojunction bipolar transistor (HBT) power densities and there are several competing technologies evolving to reduce the thermal impedance of HBTs. This comment specifically addresses the question: does the flip-chip technology proposed by D. Hill et al. offer significantly lower HBT thermal impedance than the thermal-shunt technology? The commenters conclude that while any further reduction of the thermal impedance associated with flip-chip technology has yet to be determined, a comparison of the two technologies provides no compelling reason for adopting flip-chip technology
Keywords :
flip-chip devices; heterojunction bipolar transistors; thermal analysis; thermal resistance; HBT power densities; flip-chip technology; heterojunction bipolar transistor; thermal impedances; thermal-shunt technology; Area measurement; Bars; FETs; Fingers; Heterojunction bipolar transistors; Impedance measurement; Indium tin oxide; Solid state circuits; Temperature; Thickness measurement;
Journal_Title :
Microwave and Guided Wave Letters, IEEE
