Title :
A hardware annealing method for optimal solutions on cellular neural networks
Author :
Bang, Sa H. ; Sheu, Bing J. ; Chou, Eric Y.
Author_Institution :
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
fDate :
6/1/1996 12:00:00 AM
Abstract :
An engineering annealing method, called hardware annealing, for optimal solutions on cellular neural networks is presented. Cellular neural networks have great potential in solving many important scientific problems in signal processing and optimization by use of pre-determined templates. Hardware annealing, which is a parallel version of effective mean-field annealing in analog networks, is a highly efficient method to find optimal solutions on cellular neural networks. It does not require any iterative stochastic procedure and henceforth can be very fast. The landscape of the network energy function is first adapted so that the whole annealing process does not get stuck at a local minimum at the beginning of searching for optimal solutions by adjusting each neuron to a low voltage gain. Then, the hardware annealing searches for the globally minimum energy state by continuously increasing the gain of neurons. The globally optimal equilibrium state is reached when each neuron is at its maximum voltage gain. The robustness of this proposed hardware annealing method for global optimization is assessed by analysis of the eigenvalues in a corresponding dynamical system model
Keywords :
cellular neural nets; simulated annealing; cellular neural network; dynamical system model; eigenvalues; energy function; global optimization; hardware annealing; neuron gain; robustness; Annealing; Cellular neural networks; Energy states; Low voltage; Neural network hardware; Neurons; Optimization methods; Robustness; Signal processing; Stochastic processes;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on