• DocumentCode
    974592
  • Title

    Low voltage high performance E/D MOS logic

  • Author

    Choi, Dae Hyun ; Salama, C.A.T.

  • Author_Institution
    University of Toronto, Department of Electrical Engineering, Toronto, Canada
  • Volume
    17
  • Issue
    23
  • fYear
    1981
  • Firstpage
    879
  • Lastpage
    880
  • Abstract
    The letter describes a high performance MOS technology which produces both enhancement- and depletion-mode devices on the same substrate without using ion implantation. The enhancement mode devices, with 1¿2 ¿m channel lengths, can be realised using regular optical lithography and simple processing techniques.
  • Keywords
    field effect integrated circuits; integrated circuit technology; integrated logic circuits; 1 to 2 micron channel lengths; MOS logic; depletion-mode devices; enhancement mode devices; high performance MOS technology; low voltage high performance; optical lithography;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19810613
  • Filename
    4246095
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=974592