DocumentCode :
974910
Title :
Generalised systolic ring serial floating point multiplier
Author :
Marwood, W.
Author_Institution :
Dept. of Electr. & Electron. Eng., Adelaide Univ., SA, Australia
Volume :
26
Issue :
11
fYear :
1990
fDate :
5/24/1990 12:00:00 AM
Firstpage :
753
Lastpage :
754
Abstract :
A systolic cell is defined in terms of recurrences. These recurrences are used to define the operation of a state machine constructed from a linear systolic array. The machine is shown to implement floating point multiplication when serial floating point operands are applied to its inputs. This result is extended to define a systolic ring floating point multiplier implemented with a combination of delay stages and systolic cells.
Keywords :
cellular arrays; digital arithmetic; logic circuits; multiplying circuits; parallel architectures; delay stages; linear systolic array; recurrences; serial floating point multiplier; serial floating point operands; serial systolic-ring configuration; state machine; systolic cells;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19900492
Filename :
106061
Link To Document :
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