Abstract :
Based on a previous design (see ibid., vol. 32, no. 10, p. 934-5, 1996), an improved low powered, high gain amplifier for capacitive detector front-end read-out is discussed. The optimised amplifier´s 1/|f|α noise is strongly suppressed. The circuit has a differential gain of >500 mV/4fC, an average 10/90% rise time of 150 ns (with Ct=8pF), a noise figure of 562⊕28.Ct electrons e¯, and a power consumption of 650 μW. The circuit was simulated in the radiation hard SOI BiCMOS technology of DMILL
Keywords :
BiCMOS analogue integrated circuits; integrated circuit noise; interference suppression; nuclear electronics; pulse amplifiers; radiation hardening (electronics); silicon-on-insulator; 1/f noise suppression; 150 ns; 650 muW; DMILL; Si; capacitive detector; differential gain; front-end readout pulse amplifiers; low powered high gain amplifier; radiation hard SOI BiCMOS technology;
