Avalanche-induced drain-source breakdown in silicon-on-insulator n-MOSFETs

Author

Young, Konrad K. ; Burns, James A.

Author_Institution

MIT Lincoln Lab., Lexington, MA, USA

Volume

35

Issue

4

fYear

1988

fDate

4/1/1988 12:00:00 AM

Firstpage

426

Lastpage

431

Abstract

A proposed breakdown model includes the effects of floating substrate and finite silicon thickness. The calculated I-V characteristics in the breakdown region agree well with the experimental results. The results show that (1) the drain-source breakdown voltage of silicon-on-insulator (SOI) n-MOSFETs increases with increasing channel length, increasing positive substrate voltage, and decreasing silicon film thickness; and (2) SOI n-MOSFETs have higher breakdown voltage than their bulk-silicon counterparts at large gate bias, but lower breakdown voltage at small gate bias

Keywords

electric breakdown of solids; insulated gate field effect transistors; semiconductor device models; I-V characteristics; SOI n-MOSFETs; Si film thickness; avalanche induced drain source breakdown; breakdown model; channel length; drain-source breakdown voltage; effects of floating substrate; experimental results; gate bias; positive substrate voltage; silicon-on-insulator; Breakdown voltage; Electric breakdown; FETs; Impact ionization; MOSFET circuits; Predictive models; Semiconductor films; Silicon on insulator technology; Substrates; Threshold voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.2475

Filename

2475