Title :
Multiple-valued radix-2 signed-digit arithmetic circuits for high-performance VLSI systems
Author :
Kawahito, Shoji ; Kameyama, Michitaka ; Higuchi, Tatsuo
Author_Institution :
Dept. of Electr. & Electron. Eng., Toyohashi Univ. of Technol., Japan
fDate :
2/1/1990 12:00:00 AM
Abstract :
VLSI-oriented multiple-valued current-mode MOS arithmetic circuits using radix-2 signed-digit number representations are proposed. A prototype adder chip is implemented with 10-μm CMOS technology to confirm the principle of operation. A multiplication scheme using four-input current-mode wired summations for realizing a high-speed small-size multiplier is presented. The 32×32-b multiplier is composed of 18800 transistors and required fewer interconnections. The multiply time is estimated to be 45 ns by SPICE simulation in 2-μm CMOS technology. It is shown that the technology is also potentially effective for the reduction of the data-bus area in VLSI
Keywords :
CMOS integrated circuits; VLSI; adders; digital arithmetic; integrated circuit technology; multiplying circuits; 10 micron; 2 micron; 32 bit; 45 ns; CMOS technology; SPICE simulation; VLSI systems; adder chip; data-bus area; four-input current-mode wired summations; high-speed small-size multiplier; multiple-valued current-mode MOS arithmetic circuits; multiplication scheme; multiply time; operation; prototype; radix-2 signed-digit arithmetic circuits; radix-2 signed-digit number representations; Adders; Arithmetic; CMOS technology; Circuit noise; Circuit simulation; Current mode circuits; Integrated circuit interconnections; Prototypes; SPICE; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
