The influence of the measurement setup on enhanced AC hot carrier degradation of MOSFETs

It is shown that the enhanced degradation and substrate current component, which is observed in several AC experiments at the falling edge of the gate pulse under high drain bias, can in some cases be primarily ascribed to a carrier injection due to the forward biasing of the source diode and a simultaneous drain voltage overshoot. The forward biasing of the source diode is not caused by the commonly known latch-up effect, which is triggered by the substrate current, but by an insufficient AC coupling of the source to the ground due to the parasitic inductance of the wiring. It is demonstrated that by putting a capacitor at the drain side of the transistor and grounding the source at the probe tip, the observed enhanced substrate current can be eliminated and the anomalous enhanced degradation reduced accordingly