DocumentCode
977472
Title
Genetic framework for the high level optimisation of low power VLSI DSP systems
Author
Bright, M.S. ; Arslan, T.
Author_Institution
Sch. of Eng., Univ. of Wales, Cardiff, UK
Volume
32
Issue
13
fYear
1996
fDate
6/20/1996 12:00:00 AM
Firstpage
1150
Lastpage
1151
Abstract
The authors present a technique for optimising CMOS based DSP systems for power. A genetic algorithm is used to reduce power, while tracking area and speed specifications, through the application of high level transformations. The algorithm searches for systems with the lowest power consumption within a large solution space. Results are presented which demonstrate the efficiency of the genetic algorithm as a power optimisation tool for complex VLSI systems
Keywords
CMOS digital integrated circuits; VLSI; circuit CAD; circuit optimisation; data flow graphs; digital signal processing chips; genetic algorithms; high level synthesis; integrated circuit design; CMOS based DSP systems; area specifications; complex VLSI systems; genetic algorithm; high level optimisation; high level transformations; low power VLSI DSP systems; power consumption; power optimisation tool; speed specifications;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19960795
Filename
502968
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