DocumentCode
977636
Title
Three-dimensional CMOS NAND with three stacked channels
Author
Roos, G. ; Hoefflinger, B.
Author_Institution
Inst. for Microelectron., Stuttgart, Germany
Volume
29
Issue
24
fYear
1993
Firstpage
2103
Lastpage
2104
Abstract
A process-inherent NAND2 device is presented for a three-dimensional CMOS integration with epitaxial lateral overgrowth and chemo-mechanical polishing. The required ´OR´ function of the two PMOS transistors is achieved by one silicon volume, which is controlled by a back gate and a conventional front gate. Almost symmetrical characteristics are measured for the front and the back gates.
Keywords
CMOS integrated circuits; integrated logic circuits; logic gates; 3D CMOS gate; OR function; PMOS transistors; back gate; chemo-mechanical polishing; epitaxial lateral overgrowth; front gate; process-inherent NAND2 device; symmetrical characteristics; three stacked channels; three-dimensional CMOS NAND;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19931406
Filename
247596
Link To Document