Title :
Effect of a Two-Step Recess Process Using Atomic Layer Etching on the Performance of In0.52Al0.48As/In0.53Ga0.47As p-HEMTs
Author :
Kim, Tae-Woo ; Kim, Dae-Hyun ; Park, Sang Duk ; Yeom, Geun Young ; Byeong Lim Ok ; Rhee, Jin-Koo ; Jang, Jae-Hyung ; Song, Jong-In
Author_Institution :
GIST, Gwangju
Abstract :
The characteristics of 0.15- mum InAlAs/InGaAs pseudomorphic high-electron mobility transistors (p-HEMTs) that were fabricated using the Ne-based atomic layer etching (ALET) technology and the Ar-based conventional reactive ion etching (RIE) technology were investigated. As compared with the RIE, the ALET used a much lower plasma energy and thus produced much lower plasma-induced damages to the surface and bulk of the In0.52AI0.48As barrier and showed a much higher etch selectivity (~70) of the InP spacer against the In0.52Al0.48As barrier. The 0.15-mum InAlAs/InGaAs p-HEMTs that were fabricated using the ALET exhibited improved Gm,max (1.38 S/mm), IONn/IOFF(1.18X104), drain-induced barrier lowering (80 mWV), threshold voltage uniformity (Vth,avg = -190 mV and alpha = 15 mV), and ftau (233 GHz), mainly due to the extremely low plasma-induced damage in the Schottky gate area.
Keywords :
Schottky gate field effect transistors; high electron mobility transistors; indium compounds; sputter etching; ALET; In0.52Al0.48As-In0.53Ga0.47As - Interface; RIE technology; Schottky gate; atomic layer etching; p-HEMT fabrication; plasma energy; pseudomorphic high-electron mobility transistor; reactive ion etching; size 0.15 mum; two-step recess process; Artificial intelligence; Atomic layer deposition; Etching; HEMTs; Indium compounds; Indium gallium arsenide; MODFETs; PHEMTs; Plasma applications; Plasma properties; $I_{rm ON}/I_{rm OFF}$ ratio; Atomic layer etching (ALET); drain-induced barrier lowering (DIBL); pseudomorphic high-electron mobility transistor (p-HEMT); subthreshold slope;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2007.910278
