Punchthrough in Josephson logic devices

We present here an analysis of punchthrough for simple latching circuits containing Josephson junctions and driven by a trapezoidal AC supply current. Until recently it was thought that in such circuits there should exist a critical transition time for polarity reversal of the supply current above which punchthrough would not occur. Recent work, however, has suggested that there is a punchthrough probability tail which extends beyond the supposed critical transition time. We have developed a simple model for punchthrough in the tail region that is in good agreement with numerical simulations. Our analysis also indicates that the addition of a short dwell time at the zero-crossing of the supply current waveform will greatly reduce the punchthrough probability. A first-pass estimate of the implications of our results for punchthrough in large systems suggests that punchthrough may not be a serious limitation.