Title :
Compact CMOS circuit for outlier removal
Author_Institution :
Dept. of Electr. Eng., Kentucky Univ., Lexington, KY, USA
fDate :
5/23/1996 12:00:00 AM
Abstract :
A CMOS chip that averages an array of analogue inputs and removes outlying inputs from the calculation of the output is presented. Implemented in analogue VLSI, these circuits perform the outlier-based averaging massively in parallel, while using only 13 transistors per analogue input in the array. This technique allows the preprocessing of massive arrays of analogue inputs, commonly found in sensing applications, on the input plane itself, thereby reducing the communication bottleneck at the chip I/O interface
Keywords :
CMOS analogue integrated circuits; VLSI; analogue processing circuits; parallel processing; sensor fusion; analogue VLSI; analogue inputs; compact CMOS circuit; massive arrays; outlier removal; outlier-based averaging; parallel processing; sensing applications;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19960654