DocumentCode :
979013
Title :
Sub-quarter-micrometre GaAs MESFET process with WSi sidewall gate
Author :
Uda, Tetsuya ; Nishitsuji, M. ; Nishii, Kento ; Fujimoto, Kenji ; Tamura, A.
Author_Institution :
Electron. Res. Lab., Matsushita Electron. Corp., Osaka
Volume :
32
Issue :
11
fYear :
1996
fDate :
5/23/1996 12:00:00 AM
Firstpage :
1038
Lastpage :
1039
Abstract :
The authors have developed a novel sub-quarter-micrometre WSi sidewall gate GaAs MESFET (SIG-FET) fabrication process. In this process, using WSi sidewalls as gate electrodes, the gate length is controlled only by the thickness of a WSi thin film deposited by sputtering, and sub-quarter-micrometre gates can be fabricated easily without using photolithography. The 0.15 μm-gate SIG-FET has exhibited ft=5O GHz and fmax=120 GHz
Keywords :
III-V semiconductors; Schottky gate field effect transistors; gallium arsenide; semiconductor device metallisation; sputter deposition; tungsten compounds; 0.15 micron; 120 GHz; GaAs; GaAs MESFET; SIG-FET; WSi; WSi sidewall gate; fabrication; sub-quarter-micrometre process; thin film sputtering;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19960657
Filename :
503105
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=979013
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