Measurement and modeling errors in noise parameters of scaled-CMOS devices

Author

Banerjee, Gaurab ; Soumyanath, K. ; Allstot, David J.

Author_Institution

Intel Corp., Hillsboro, OR

Volume

54

Issue

6

fYear

2006

fDate

6/1/2006 12:00:00 AM

Firstpage

2336

Lastpage

2345

Abstract

Noise parameter measurements of submicrometer scaled-CMOS devices are error prone. These errors can propagate to a device model affecting the performance of low-noise amplifiers (LNAs) designed with them. In this paper, measurement errors in noise parameters of submicrometer scaled-CMOS devices are quantified. The sensitivity of different noise parameters to measurement and modeling errors is examined, showing that some parameters (NF_min,R_n) are more immune to such errors than others (G_opt,B_opt). We propose a modeling and design approach (desensitization by R_n-optimization) that can greatly alleviate the impact of such errors on the noise figure of LNAs. Measured results from a 90-nm LNA show substantial (ges 2.5 dB) improvement in its noise figure as a result of desensitization

Keywords

CMOS analogue integrated circuits; integrated circuit measurement; integrated circuit modelling; low noise amplifiers; measurement errors; 90 nm; CMOS device model; low noise amplifiers; measurement errors; modeling errors; noise parameter measurements; submicrometer scaled-CMOS devices; Low-noise amplifiers; Measurement errors; Noise figure; Noise generators; Noise measurement; Parasitic capacitance; Radio frequency; Semiconductor device modeling; Semiconductor device noise; Solid modeling; CMOS; desensitization; errors; low-noise amplifier (LNA); measurements; modeling; noise figure; noise parameters; scaling;

fLanguage

English

Journal_Title

Microwave Theory and Techniques, IEEE Transactions on

Publisher

ieee

ISSN

0018-9480

Type

jour

DOI

10.1109/TMTT.2006.875269

Filename

1643560