DocumentCode :
980061
Title :
Optimized topology for high efficiency battery discharge regulator
Author :
Ejea, Juan B. ; Ferreres, Agustin ; Sanchis-Kilders, Esteban ; Maset, Enrique ; Esteve, Vicente ; Jordan, Jose ; Garrigos, A.
Author_Institution :
Univ. of Valencia, Valencia
Volume :
44
Issue :
4
fYear :
2008
Firstpage :
1511
Lastpage :
1521
Abstract :
In the following years power levels of 20 kW to 50 kW will be demanded by the telecommunication satellites. It is not possible to keep 0.5 kW modules with up to 100 modules in parallel and, therefore, higher power modules must be used. A higher bus voltage seems also necessary and any voltage below 150 V and above 100 V could meet the needs. In addition, new optimized topologies that process only a part of the total power delivery can be employed to improve the efficiency. In this article, design guidelines and experimental results of a high efficiency battery discharge regulator (BDR) module based on parallel power processing are given.
Keywords :
battery chargers; modules; space vehicles; telecommunication power supplies; bus voltage; high-efficiency battery discharge regulator; high-power modules; optimized topology; parallel power processing; power 0.5 kW; power 20 kW to 50 kW; telecommunication satellites; total power delivery; Artificial satellites; Batteries; Circuit topology; Electrostatic precipitators; Guidelines; Materials science and technology; Multichip modules; Regulators; Thermal management; Voltage;
fLanguage :
English
Journal_Title :
Aerospace and Electronic Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9251
Type :
jour
DOI :
10.1109/TAES.2008.4667726
Filename :
4667726
Link To Document :
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