Algorithms for transient three-dimensional mixed-level circuit and device simulation

Author

Mayaram, Kartikeya ; Chern, Jue-Hsien ; Yang, Ping

Author_Institution

Semicond. Process & Design Center, Texas Instrum. Inc., Dallas, TX, USA

Volume

12

Issue

11

fYear

1993

fDate

11/1/1993 12:00:00 AM

Firstpage

1726

Lastpage

1733

Abstract

Algorithms for transient mixed-level circuit and device simulation using a full two-carrier three-dimensional (3-D) device simulator SIERRA and the circuit simulator SPICE3 are presented. Circuit and device simulator coupling algorithms that are suited for two-dimensional mixed-level circuit and device simulation using direct solvers cannot be successfully employed when iterative solution techniques are used in 3-D device simulation. New algorithms to couple the circuit and 3-D device simulator have been developed and evaluated. The importance of 3-D mixed-level circuit and device simulation is demonstrated by applying it to single-event upset in CMOS SRAM cells

Keywords

SPICE; circuit analysis computing; digital simulation; transient response; CMOS SRAM cells; SIERRA; SPICE3; circuit simulator; coupling algorithms; full two-carrier 3D device simulator; mixed-level circuit/device simulation; single-event upset; transient three-dimensional simulation; Analytical models; Circuit simulation; Context modeling; Coupling circuits; Iterative algorithms; Process design; Random access memory; Semiconductor process modeling; Single event upset; Transient analysis;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.248083

Filename

248083