DocumentCode
980921
Title
Design-in-Reliability Approach for NBTI and Hot-Carrier Degradations in Advanced Nodes
Author
Huard, Vincent ; Parthasarathy, C.R. ; Bravaix, Alain ; Hugel, T. ; Guérin, Chloé ; Vincent, E.
Author_Institution
STMicroelectron., Crolles
Volume
7
Issue
4
fYear
2007
Firstpage
558
Lastpage
570
Abstract
A practical and accurate design-in-reliability methodology has been developed for designs on 90-65-nm technology nodes to quantitatively assess the degradation due to hot carrier and negative bias temperature instability. Simulation capability has been built on top of an existing analog simulator ELDO. Circuits are analyzed using this methodology, illustrating the capabilities of the methodology as well as highlighting the impacts of the two degradation modes.
Keywords
hot carriers; semiconductor device reliability; design-in-reliability methodology; hot-carrier degradation; negative bias temperature instability; semiconductor device reliability; Circuit simulation; Degradation; Design methodology; Hot carriers; Human computer interaction; Negative bias temperature instability; Niobium compounds; Paper technology; Stress; Titanium compounds; Not given;
fLanguage
English
Journal_Title
Device and Materials Reliability, IEEE Transactions on
Publisher
ieee
ISSN
1530-4388
Type
jour
DOI
10.1109/TDMR.2007.911380
Filename
4384507
Link To Document