DocumentCode
981693
Title
DSP56200: An algorithm-specific digital signal processor peripheral
Author
Hillman, Garth D.
Author_Institution
Motorola Semiconductor Products Sector, Austin, TX, USA
Volume
75
Issue
9
fYear
1987
Firstpage
1185
Lastpage
1191
Abstract
Performing finite sums of products is the foundation of digital signal processing (DSP). This paper describes the architecture and two applications of the DSP56200, an algorithm-specific, as opposed to application-specific, digital signal processor peripheral. The DSP56200 implements the finite sum of products and the least mean square (LMS) coefficient update algorithms. Echo cancellation and polyphase sample rate conversion filters are the applications discussed. The requirements of voice-echo cancelers are contrasted with those of data-echo cancelers. Both polyphase interpolators and decimators are described.
Keywords
Circuits; Convolution; Costs; Digital signal processing; Digital signal processors; Equations; Finite impulse response filter; Least squares approximation; Signal processing; Signal processing algorithms;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/PROC.1987.13871
Filename
1458138
Link To Document