Title :
A 24-GHz 3.9-dB NF low-noise amplifier using 0.18 μm CMOS technology
Author :
Shin, S.-C. ; Ming-Da Tsai ; Ren-Chieh Liu ; Lin, K.-Y. ; Huei Wang
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fDate :
7/1/2005 12:00:00 AM
Abstract :
A 24-GHz low-noise amplifier (LNA) was designed and fabricated in a standard 0.18-μm CMOS technology. The LNA chip achieves a peak gain of 13.1 dB at 24 GHz and a minimum noise figure of 3.9 dB at 24.3 GHz. The supply voltage and supply current are 1 V and 14 mA, respectively. To the author´s knowledge, this LNA demonstrates the lowest noise figure among the reported LNAs in standard CMOS processes above 20 GHz.
Keywords :
CMOS integrated circuits; MMIC amplifiers; integrated circuit design; 0.18 micron; 1 V; 13.1 dB; 14 mA; 24 GHz; 3.9 dB; CMOS technology; LNA chip; MMIC; k-band; low-noise amplifier; microwave monolithic integrated circuit; noise figure; supply current; supply voltage; CMOS process; CMOS technology; Circuits; Low-noise amplifiers; Noise figure; Noise measurement; Performance gain; Radio frequency; Semiconductor device modeling; Voltage; CMOS; k-band; low noise amplifier (LNA); microwave monolithic integrated circuit (MMIC);
Journal_Title :
Microwave and Wireless Components Letters, IEEE
DOI :
10.1109/LMWC.2005.851552
