Title :
A packaged high-performance decision IC up to 45-Gb/s
Author :
Lao, Z. ; Guinn, K. ; Delaney, M. ; Jensen, J. ; Fields, C. ; Thomas, Stephan
Author_Institution :
HRL Labs., Malibu, CA, USA
fDate :
7/1/2005 12:00:00 AM
Abstract :
A packaged D-type flip-flop (DFF) decision circuit for optical OC-768 systems and testing equipment is reported. The circuit uses 1 μm InP SHBT technology featuring fT/fmax=150 GHz and has been operated up to 45 Gb/s with a clock phase margin about 180/spl deg/. Measured output eye diagrams from packaged devices exhibit 9/8 ps rise/fall with only 3ps peak-peak jitter. A single-ended AC-coupled clock input makes the application of this circuit very convenient. The IC dissipates 440 mW from a -4V supply voltage.
Keywords :
III-V semiconductors; decision circuits; flip-flops; heterojunction bipolar transistors; indium compounds; integrated circuit design; integrated circuit packaging; optical communication equipment; -4 V; 1 micron; 150 GHz; 440 mW; AC-coupled clock; D-type flip-flop; InP; SHBT technology; clock phase margin; decision circuit; high-speed integrated circuit; optical OC-768 system; optical communication system; packaged high-performance decision IC; testing equipment; Capacitors; Circuit testing; Clocks; Flip-flops; Integrated circuit packaging; Jitter; Packaging machines; Photonic integrated circuits; System testing; Voltage; D-type flip-flop (DFF); Decision circuit; InP SHBT technology; OC-768; high-speed integrated circuit; optical communication systems; package;
Journal_Title :
Microwave and Wireless Components Letters, IEEE
DOI :
10.1109/LMWC.2005.851569
