DocumentCode :
985190
Title :
A high speed adder using Josephson elements
Author :
Morisue, M. ; Kuramochi, K. ; Matsuo, H.
Author_Institution :
Saitama University, Urawa, Japan
Volume :
17
Issue :
6
fYear :
1981
fDate :
11/1/1981 12:00:00 AM
Firstpage :
3420
Lastpage :
3422
Abstract :
A high-speed adder employing Josephson elements is proposed. This adder is constructed by using a novel Exclusive-OR logic and a high speed carry propagation technique. The principle of the operation is described and the simulation of the adder, of which model is based on the distributed parameter circuit, is illustrated in detail. The results of the simulation show that the adder operates with gate delay of order of 28ps at the dissipation levels of 125μw/ gate. The main advantages of this adder are its simple construction and extremely high operating speed.
Keywords :
Addition; Josephson device logic circuits; Adders; Computer simulation; Distributed parameter circuits; Equivalent circuits; Impedance; Josephson junctions; Logic gates; Signal generators; Superconducting transmission lines; Tunneling;
fLanguage :
English
Journal_Title :
Magnetics, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9464
Type :
jour
DOI :
10.1109/TMAG.1981.1061567
Filename :
1061567
Link To Document :
بازگشت