Title :
Translinear logic¿a new technique in bipolar technology
Author :
Kemp, Andreas J.
Author_Institution :
Council for Scientific and Industrial Research, National Electrical Engineering Research Institute, Pretoria, South Africa
Abstract :
Translinear logic (TLL) is based on a new gate structure which can be realised in a standard bipolar technology. Initial results from a conservative (10 ¿m) process indicate a packing density of 40 gates/mm2 and a minimum gate delay of 3 ns. Compared to integrated Schottky logic (ISL) made with the same process, TLL has a similar packing density but is four times faster.
Keywords :
bipolar integrated circuits; integrated logic circuits; logic circuits; TLL; gate delay 3 ns; gate structure; packing density; standard bipolar technology; translinear logic;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19830242
