DocumentCode
985433
Title
Fast hardware implementation of the Winograd Fourier transform algorithm
Author
Macleod, M.D. ; Bragg, N.L.
Author_Institution
Cambridge Consultants Ltd., Cambridge, UK
Volume
19
Issue
10
fYear
1983
Firstpage
363
Lastpage
365
Abstract
We describe a novel partitioning of small Winograd DFTs into two identical subunits, each of which computes a real-input DFT. A bit-serial arithmetic single IC implementation in semicustom or custom LSI is described. A fast hardware WFTA is then proposed which is efficient for complex or real input data.
Keywords
computer architecture; computerised signal processing; digital integrated circuits; fast Fourier transforms; large scale integration; FFT; WFTA; Winograd Fourier transform algorithm; bit-serial arithmetic single IC implementation; computer input data; custom LSI; fast hardware implementation; real-input DFT; semicustom LSI;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19830252
Filename
4247698
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