DocumentCode
986264
Title
Joint dynamic voltage scaling and adaptive body biasing for heterogeneous distributed real-time embedded systems
Author
Yan, Le ; Luo, Jiong ; Jha, Niraj K.
Author_Institution
Dept. of Electr. Eng., Princeton Univ., NJ, USA
Volume
24
Issue
7
fYear
2005
fDate
7/1/2005 12:00:00 AM
Firstpage
1030
Lastpage
1041
Abstract
While dynamic power consumption has traditionally been the primary source of power consumption, leakage power is becoming an increasingly important concern as technology feature size continues to shrink. Previous system-level approaches focus on reducing power consumption without considering leakage power consumption. To overcome this limitation, we propose a two-phase approach to combine dynamic voltage scaling (DVS) and adaptive body biasing (ABB) for distributed real-time embedded systems. DVS is a powerful technique for reducing dynamic power consumption quadratically. However, DVS often requires a reduction in the threshold voltage that increases subthreshold leakage current exponentially and, hence, subthreshold leakage power consumption. ABB, which exploits the exponential dependence of subthreshold leakage power on the threshold voltage, is effective in managing leakage power consumption. We first derive an energy consumption model to determine the optimal supply voltage and body bias voltage under a given clock frequency. Then, we analyze the tradeoff between energy consumption and clock period to allocate slack to a set of tasks with precedence relationships and real-time constraints. Based on this two-phase approach, we propose a new system-level scheduling algorithm that can optimize both dynamic power and leakage power consumption by performing DVS and ABB simultaneously for distributed real-time embedded systems. Experimental results show that the average power reduction of our technique with respect to DVS alone is 37.4% for the 70-nm technology.
Keywords
CAD; electronic engineering computing; embedded systems; multiprocessing systems; processor scheduling; 70 nm; CAD; adaptive body biasing; body bias voltage; computer aided engineering; dynamic power consumption; dynamic voltage scaling; energy consumption model; heterogeneous distributed real-time embedded systems; leakage power consumption reduction; low power consumption; optimal supply voltage; power consumption optimization; subthreshold leakage current; subthreshold leakage power consumption; system-level scheduling algorithm; two-phase approach; Clocks; Dynamic voltage scaling; Embedded system; Energy consumption; Energy management; Power system modeling; Real time systems; Subthreshold current; Threshold voltage; Voltage control; Distributed system; embedded system; low power; power consumption; power management; real-time computing;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2005.850895
Filename
1458930
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