A Second-Order Antialiasing Prefilter for a Software-Defined Radio Receiver

Author

Mirzaei, Ahmad ; Chehrazi, Saeed ; Bagheri, Rahim ; Abidi, Asad A.

Author_Institution

Broadcom Corp., Irvine, CA, USA

Volume

56

Issue

7

fYear

2009

fDate

7/1/2009 12:00:00 AM

Firstpage

1513

Lastpage

1524

Abstract

A new architecture is presented for a sinc²(f) filter intended to sample channels of varying bandwidth when surrounded by blockers and adjacent bands. The sample rate is programmable from 5 to 40 MHz, and aliases are suppressed by 45 dB or more. The noise and linearity performance of the filter is analyzed, and the effects of various imperfections such as transconductor finite output impedance, interchannel gain mismatch, and residual offsets in the channels are studied. Furthermore, it is proved that the filter is robust to the clock jitter. The 0.13- mum CMOS circuit consumes 6 mA from a 1.2-V supply.

Keywords

CMOS integrated circuits; filters; radio receivers; software radio; CMOS circuit; clock jitter; current 6 mA; frequency 5 MHz to 40 MHz; interchannel gain mismatch; residual offsets; second-order antialiasing prefilter; size 0.13 mum; software-defined radio receiver; transconductor finite output impedance; voltage 1.2 V; ${rm sinc}$ function; Antialiasing prefilter; integration sampler; jitter; noise; receiver; reconfigurable; software-defined radio (SDR);

fLanguage

English

Journal_Title

Circuits and Systems I: Regular Papers, IEEE Transactions on

Publisher

ieee

ISSN

1549-8328

Type

jour

DOI

10.1109/TCSI.2008.2007062

Filename

4671071