DocumentCode :
986514
Title :
Improving gate-oxide reliability by TiN capping layer on NiSi FUSI metal gate
Author :
Liu, J. ; Wen, H.-C. ; Lu, J.P. ; Kwong, D.L.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Texas, Austin, TX, USA
Volume :
26
Issue :
7
fYear :
2005
fDate :
7/1/2005 12:00:00 AM
Firstpage :
458
Lastpage :
460
Abstract :
The impact of TiN capping layer on gate oxide reliability of NiSi fully silicided metal gate was investigated. It was found that the TiN capping layer significantly improved Vth stability and oxide reliability during negative bias temperature stress. Better life-time performance was also extrapolated for the samples with TiN capping layer.
Keywords :
dielectric materials; interface states; nickel compounds; titanium compounds; FUSI metal gate; NiSi; TiN; boron penetration; capping layer; fully silicided metal gate; gate-oxide reliability; interface state; negative bias temperature stress; threshold voltage stability; Boron; CMOS technology; Degradation; Electrodes; Instruments; Silicides; Stress; Temperature; Testing; Tin; Bias temperature (BT); TiN; boron penetration; capping layer; fully silicided (FUSI); interface state; metal gate;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2005.851158
Filename :
1458955
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=986514
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