DocumentCode :
986705
Title :
Do´s and don´ts with the agilent´s G-link chipset
Author :
Aloisio, Alberto ; Cevenini, Francesco ; Izzo, Vincenzo
Author_Institution :
Dipt. di Sci. Fisiche, Univ. Federico II, Napoli, Italy
Volume :
53
Issue :
3
fYear :
2006
fDate :
6/1/2006 12:00:00 AM
Firstpage :
795
Lastpage :
800
Abstract :
The Agilent´s G-Link serializers-deserializers are long lasting and widely used devices to implement serial links in the range of ∼1 Gbit/s on copper and fibres. They feature a wide clocking window spanning the 13-70 MHz range, the ability to compensate for a constant phase delay in the clock distribution between the Tx and Rx node, low and deterministic link latency. All that makes this old-fashioned, power-hungry bipolar chipset still a popular choice in the design of modern trigger and data acquisition systems. The last entry in the family, named HDMP-103xA, has been released in the second half of 2001, as a drop-in replacement for the previous HDMP-103x silicon version. Despite the recent upgrade, the latest G-Link chip-set still suffers from subtle misbehaviors and undocumented bugs which may jeopardize even a very conservative design. In this paper we report our experience with G-Link during the design and test of the optical link for Level-1 Muon Trigger of the ATLAS experiment. We describe an ad-hoc platform developed for debugging the link and present the results of tests conducted in the lab.
Keywords :
data acquisition; high energy physics instrumentation computing; jitter; optical fibre networks; optical links; optical phase locked loops; position sensitive particle detectors; telecommunication links; trigger circuits; ATLAS experiment; Agilents G-Link chipset deserializers; Agilents G-Link chipset serializers; HDMP-103x silicon version; HDMP-103xA; Rx node; Tx node; ad-hoc platform; clock distribution; clocking window spanning; constant phase delay; data acquisition systems; deterministic link latency; jitter; level-1 muon trigger; link debugging; low link latency; modern trigger design; noise generators; optical link; phase locked loop; power-hungry bipolar chipset; serial links; subtle misbehaviors; undocumented bugs; Clocks; Computer bugs; Copper; Data acquisition; Delay; Optical design; Optical fiber communication; Optical fiber devices; Silicon; Testing; Data acquisition; jitter; noise generators; phase locked loop; serial links;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.2006.874143
Filename :
1644944
Link To Document :
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