DocumentCode :
986907
Title :
A cost-efficient high-speed 12-bit pipeline ADC in 0.18-μm digital CMOS
Author :
Andersen, Terje Nortvedt ; Hernes, Bjørnar ; Briskemyr, Atle ; Telstø, Frode ; Bjørnsen, Johnny ; Bonnerud, Thomas E. ; Moldsvor, Øystein
Author_Institution :
Nordic Semicond., Tiller, Norway
Volume :
40
Issue :
7
fYear :
2005
fDate :
7/1/2005 12:00:00 AM
Firstpage :
1506
Lastpage :
1513
Abstract :
A 12-bit pipeline ADC fabricated in a 0.18-μm pure digital CMOS technology is presented. Its nominal conversion rate is 110 MS/s and the nominal supply voltage is 1.8 V. The effective number of bits is 10.4 when a 10-MHz input signal with 2VP-P signal swing is applied. The occupied silicon area is 0.86 mm2 and the power consumption equals 97 mW. A switched capacitor bias current generator scales the opamp bias currents automatically with the conversion rate, which gives scaleable power consumption and full performance of the ADC from 20 to 140 MS/s.
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; high-speed integrated circuits; switched capacitor networks; 0.18 micron; 0.86 mm; 1.8 V; 10 MHz; 10.4 bit; 12 bit; 97 mW; Nyquist converters; digital CMOS technology; pipeline ADC; switched capacitor; CMOS technology; Energy consumption; MOS capacitors; Pipelines; Power dissipation; Power generation; Semiconductor device noise; Silicon; Ultrasonic imaging; Voltage; Analog-to-digital converter (ADC); Nyquist converters; pipeline ADC;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2005.847519
Filename :
1458994
Link To Document :
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