• DocumentCode
    987127
  • Title

    Experimental realisation of a full adder by substrate fed threshold logic structure

  • Author

    Han, C.H. ; Kim, Choong Ki

  • Author_Institution
    Korea Advanced Institute of Science & Technology, Department of Electrical Engineering, Seoul, Korea
  • Volume
    19
  • Issue
    16
  • fYear
    1983
  • Firstpage
    613
  • Lastpage
    615
  • Abstract
    A full adder has been designed and fabricated utilising substrate fed threshold logic. The internal operation is performed by four-valued threshold currents while the input and output signals are of binary form. The delay times of the experimental circuit operating with 10 ¿A per injection window have been measured as 5 ¿s for the sums and 1 ¿s for the carry.
  • Keywords
    adders; integrated logic circuits; many-valued logics; threshold logic; binary form; delay times; four-valued threshold currents; full adder; logic ICs; substrate fed threshold logic structure;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19830418
  • Filename
    4247916
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=987127