New Address-While-Display Driving Method for High Contrast Ratio and Wide Operation Margin PDP Using Short Ramp Reset (SRR) and Short Pulse Erase (SPE) Schemes

We propose a new address-while-display (AWD) driving method for a plasma display panel to obtain a high contrast ratio and a wide operation margin, which is composed of a short ramp reset (SRR) period, a short erase period, a sustain period, and an address period as the basic units. The SRR pulse and the short pulse erase period make it possible to obtain a wide operating voltage margin and minimize the background luminance by redistributing the wall charges in a short initialization time between the address and the scan electrode. As a result, a high darkroom contrast ratio of 10 000 :1 could be achieved with a wide operating voltage margin of 40 V for a stable address.