DocumentCode
989284
Title
A Preconditioned Hierarchical Algorithm for Impedance Extraction of Three-Dimensional Structures With Multiple Dielectrics
Author
Yi, Yang ; Li, Peng ; Sarin, Vivek ; Shi, Weiping
Author_Institution
Dept. of Electr. & Comput. Eng., Texas A&M Univ., College Station, TX
Volume
27
Issue
11
fYear
2008
Firstpage
1918
Lastpage
1927
Abstract
This paper presents the first boundary element method (BEM) impedance extraction algorithm for interconnects with multiple dielectrics. Multiple dielectrics are common in integrated circuits and packages. However, previous BEM algorithms, including FastImp and FastPep, assume uniform dielectric due to their limitation, thus causing considerable errors. Our algorithm introduces a circuit formulation which makes it possible to utilize either multilayer Green´s function or equivalent charge method to extract impedance in multiple dielectrics. The novelty of the formulation is the reduction of the unknowns and the application of hierarchical data structure. The hierarchical data structure permits efficient sparsification transformation and preconditioners to accelerate the linear equation solver. Experimental results demonstrate that the new algorithm is accurate and efficient. For uniform dielectric problems, our algorithm is more accurate than FastImp while its number of unknowns is ten times less than that of FastImp. For multiple dielectric problems, its relative error with respect to HFSS is below 3%.
Keywords
boundary-elements methods; dielectric materials; electric impedance; integrated circuit interconnections; boundary element method; circuit formulation; hierarchical data structure; impedance extraction; interconnects; linear equation solver; multiple dielectrics; preconditioned hierarchical algorithm; three-dimensional structures; Acceleration; Boundary element methods; Data mining; Data structures; Dielectrics; Green´s function methods; Impedance; Integrated circuit interconnections; Integrated circuit packaging; Nonhomogeneous media; Boundary element method (BEM); impedance extraction; partial element equivalent circuit (PEEC) modeling; preconditioning;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2008.2006089
Filename
4674661
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