DocumentCode
989765
Title
Implementation-efficient reliability ratio based weighted bit-flipping decoding for LDPC codes
Author
Lee, C.-H. ; Wolf, W.
Author_Institution
Dept. of Electr. Eng., Princeton Univ., NJ, USA
Volume
41
Issue
13
fYear
2005
fDate
6/23/2005 12:00:00 AM
Firstpage
755
Lastpage
757
Abstract
It was recently shown that the reliability ratio based bit-flipping (RRWBF) decoding algorithm for low-density parity-check (LDPC) codes performs best among existing bit-flipping-based algorithms. A new version of this algorithm is proposed such that decoding time is significantly reduced, especially when the iteration number is small and the code length is large. Simulation results showed the proposed version has up to 2322.39%, 823.90%, 511.79%, and 261.92% speedup compared to the original algorithm on a UNIX workstation for 10, 30, 50, and 100 iterations. It is thus much more efficient to adopt this version for simulation and hardware implementation. Moreover, this version of the RRWBF algorithm provides a more intuitive way of interpreting its superior performance over other bit-flipping-based algorithms.
Keywords
decoding; parity check codes; LDPC codes; RRWBF decoding algorithm; UNIX workstation; decoding time; iteration number; low-density parity check codes; reliability ratio based weighted bit-flipping decoding;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20051060
Filename
1459885
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