Extraction of source and drain resistances in MOSFETs using parasitic bipolar junction transistor

Author

Kim, H.T. ; Choi, J.B. ; Lee, J.U. ; Kim, K.H. ; Kang, G.C. ; King, Douglas J. ; Min, K.S. ; Kang, G.C. ; Kim, D.J. ; Nam, I.C. ; Kim, Kwang Soon ; Kim, D.M.

Author_Institution

Sch. of Electr. Eng., Kookmin Univ., Seoul, South Korea

Volume

41

Issue

13

fYear

2005

fDate

6/23/2005 12:00:00 AM

Firstpage

772

Lastpage

774

Abstract

This work presents a new method for extracting the intrinsic source and drain resistances in MOSFETs. This is based on the open-collector method in the parasitic bipolar junction transistor (sourcebody-drain) parallel to the MOSFET. By using the Ebers-Moll equivalent model for bipolar junction transistors, the source and drain resistances are extracted separately excluding the resistance formed by the LDD region. Combining the current-voltage characteristics under a linear operation mode of MOSFETs, we can also extract the LDD-parts in the total resistance.

Keywords

MOSFET; electric resistance; semiconductor device models; Ebers-Moll equivalent model; LDD region; MOSFET; current-voltage characteristics; drain resistance extraction; lightly-doped drain region; linear operation mode; open-collector method; parasitic bipolar junction transistor; source resistance extraction;

fLanguage

English

Journal_Title

Electronics Letters

Publisher

iet

ISSN

0013-5194

Type

jour

DOI

10.1049/el:20051108

Filename

1459896