Extraction of source and drain resistances in MOSFETs using parasitic bipolar junction transistor

This work presents a new method for extracting the intrinsic source and drain resistances in MOSFETs. This is based on the open-collector method in the parasitic bipolar junction transistor (sourcebody-drain) parallel to the MOSFET. By using the Ebers-Moll equivalent model for bipolar junction transistors, the source and drain resistances are extracted separately excluding the resistance formed by the LDD region. Combining the current-voltage characteristics under a linear operation mode of MOSFETs, we can also extract the LDD-parts in the total resistance.