DocumentCode
991515
Title
Double-Gate finFETs as a CMOS Technology Downscaling Option: An RF Perspective
Author
Nuttinck, Sebastien ; Parvais, Bertrand ; Curatola, Gilberto ; Mercha, Abdelkarim
Author_Institution
NXP Semicond., Heverlee
Volume
54
Issue
2
fYear
2007
Firstpage
279
Lastpage
283
Abstract
Based on careful physical description, the effect of gate-length downscaling on the RF performance of double-gate fin field-effect transistors (finFETs) has been analyzed. Downscaling is beneficial to the device RF performance although the losses due to series parasitics increase. The source/drain series resistance in finFET largely limits the device RF performance, and the losses due to the gate resistance increase with reducing gate length. Double-gate finFETs have the potential to reach the RF International Technology Roadmap for Semiconductor targets in the few decananometer regime, but meeting the specification for gate length in the order of 10 nm may require further improvements
Keywords
CMOS integrated circuits; MOSFET; CMOS technology downscaling option; RF performance; double-gate finFET; field-effect transistors; gate resistance; radio frequency; CMOS technology; Double-gate FETs; Electronics industry; FinFETs; Helium; Microwave devices; Microwave technology; Performance analysis; Performance loss; Radio frequency; Complementary metal–oxide–semiconductor (CMOS); downscaling; fin field-effect transistor (finFET); radio frequency (RF);
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2006.888670
Filename
4067196
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