A Compact Model for Valence-Band Electron Tunneling Current in Partially Depleted SOI MOSFETs

Author

Wu, W. ; Xin Li ; Gildenblat, G. ; Workman, G.O. ; Veeraraghavan, S. ; McAndrew, C.C. ; van Langevelde, R. ; Smit, G.D.J. ; Scholten, A.J. ; Klaassen, D.B.M.

Author_Institution

Arizona State Univ., Tempe, AZ

Volume

54

Issue

2

fYear

2007

Firstpage

316

Lastpage

322

Abstract

The valence-band electron (EVB) tunneling current in partially depleted silicon-on-insulator (SOI) MOSFETs increases as the gate oxide gets thinner and affects the dynamic behavior of devices and circuits. We present an engineering model of EVB tunneling current based on the surface-potential formulation. The new model is implemented in a SOI MOSFET compact model and is used to study the impact of EVB tunneling on circuit performance. Simulations of stacked logic gates show that the EVB tunneling current not only boosts circuit switching speed but also mitigates the history dependence of propagation delays

Keywords

MOSFET; semiconductor device models; silicon-on-insulator; surface potential; tunnelling; valence bands; circuit switching speed; partially depleted SOI MOSFET; silicon-on-insulator; surface-potential formulation; symmetric linearization; valence-band electron tunneling current; Hysteresis; silicon-on-insulator (SOI); surface potential; symmetric linearization; valence-band electron (EVB) tunneling;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2006.888750

Filename

4067203