DocumentCode :
992725
Title :
Developing the GX graphics accelerator architecture
Author :
Priem, Curtis R.
Author_Institution :
Sun Microsyst. Inc., Mountain View, CA, USA
Volume :
10
Issue :
1
fYear :
1990
Firstpage :
44
Lastpage :
54
Abstract :
A novel approach to acceleration is described whereby high-level graphics on entry-level workstations has become practical. In the GX, the host CPU functions as the intelligent controller and two large ASICs (application-specific ICs) supply hardwired graphics functions. An arbitrary quadrilateral is the GX´s only geometric primitive. However, it can readily approximate circle and arc primitives with short line segments. In addition, the GX supports flat shading of images only when every pixel on a polygon is the same color or intensity. However, by breaking the object into many smaller objects (tessellation), each with its own color, users can obtain a visually acceptable approximation to Gouraud-shading techniques. A description is given of the frame buffer chip and its graphic attributes and of the transformation engine and cursor chip. The chips do not have the complex instructions found in CISC (complex-instruction-set-computer) processors; rather, they perform the equivalent of very complicated software subroutines. The high speed and scalable performance of the GX and its software interface are discussed.<>
Keywords :
computer architecture; computer graphic equipment; ASICs; GX graphics accelerator architecture; arbitrary quadrilateral; frame buffer chip; geometric primitive; hardwired graphics functions; intelligent controller; Acceleration; Accelerator architectures; Central Processing Unit; Computer graphics; Connectors; Hardware; Power supplies; Reduced instruction set computing; Rendering (computer graphics); Workstations;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.46768
Filename :
46768
Link To Document :
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