Title :
Phase-plane analysis of punchthrough in Josephson tunnel junctions
Author :
Yoshida, K. ; Enpuku, K. ; Irie, F. ; Nagatsuma, T.
Author_Institution :
Nagasaki University, Nagasaki, Japan
fDate :
5/1/1983 12:00:00 AM
Abstract :
The so-called punchthrough phenomenon in a Josephson tunnel junction is studied analytically with the phase-plane method. The dynamic behavior of the junction in the resetting process is solved analytically, whose solution leads to an expression for the punch-through probability. The obtained expression for the punchthrough probability is capable of quantitative discussion and is applicable to arbitrary waveforms of the gate current. The effect of the thermal noise on the punchthrough probability is also studied analytically. It is shown that the present analytical results agree well with those of computer simulations.
Keywords :
Josephson device logic gates; Circuit noise; Computer simulation; Equations; Frequency; Integrated circuit noise; Josephson junctions; Logic gates; Phase noise; Plasma temperature; Voltage;
Journal_Title :
Magnetics, IEEE Transactions on
DOI :
10.1109/TMAG.1983.1062252