DocumentCode :
993002
Title :
Punchthrough analysis of Josephson logic circuits
Author :
Harris, E.P. ; Chang, W.H.
Author_Institution :
IBM Thomas J. Watson Research Center, Yorktown Heights, New York
Volume :
19
Issue :
3
fYear :
1983
fDate :
5/1/1983 12:00:00 AM
Firstpage :
1209
Lastpage :
1212
Abstract :
We have developed a simple analytical method for determining punchthrough probabilities of Josephson logic circuits. In this paper we describe the method, apply it to the Current Injection Logic (CIL) family, and compare the results to punchthrough probabilities determined by numerical techniques. The method involves replacing interferometers by point junctions to simplify the equivalent circuit, and then finding approximate solutions to the resulting circuit equations which allow reduction of the circuit punchthrough problem to a point-junction punchthrough problem for which the solution can be calculated from existing theory. Of the circuits in the CIL family, we find that the AND circuits have higher punchthrough probabilities than the OR circuits, and that the 4AND has higher punchthrough probabilities than the 2AND. We predict that in order to reduce the punchthrough probability of the CIL 4AND (designed in 2.5 micrometer Pb-alloy technology) to less than 10-20, the required transition time of the bipolar AC power supply will be about 750 pS. This is roughly 200 pS more than would be required for the 2OR.
Keywords :
Josephson device logic circuits; Computer applications; Current supplies; Equations; Equivalent circuits; Josephson junctions; Logic circuits; Power supplies; Probabilistic logic; Probability; Resistors;
fLanguage :
English
Journal_Title :
Magnetics, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9464
Type :
jour
DOI :
10.1109/TMAG.1983.1062277
Filename :
1062277
Link To Document :
بازگشت