Novel Single Polysilicon EEPROM Cell With Dual Work Function Floating Gate

A novel single polysilicon electrically erasable programmable read-only memory cell with dual work function floating-gate (DWFG) structure is presented in this letter. The floating gate of the proposed DWFG cell is doped with p+ on the source side and n+ on the drain side. For DWFG devices, the floating gate on the source side has a higher work function than that on the drain side. The work function difference and the intrinsic doped region at the middle of the floating-gate affect the channel potential distribution and generate a peak lateral electric field inside the channel, improving the channel´s hot electron programming characteristics. The experimental results show that the proposed DWFG cell gives faster programming speeds and program operation at lower voltage than conventional cells