Stored-sequence sigma-delta fractional-N synthesiser

The paper describes a new approach to sigma-delta fractional-N frequency synthesis based on the storage of pre-generated bitstreams. By exploiting the nature of frequency hopping systems, fabrication of a hardware sigma-delta modulator can be avoided completely and instead an optimised sigma-delta sequence for each required channel is stored in fast memory. This allows reference frequencies of several hundred MHz, which provides a significant increase in the noise spreading performance of the modulator. The paper describes simulation and implementation of such a synthesiser. Both modelled and measured results are shown to demonstrate that a substantial improvement in performance is possible.