Three-dimensional stacked MOS transistors by localized silicon epitaxial overgrowth

Three-dimensionally integrated silicon-on-insulator MOS transistors built employing localized silicon epitaxy are discussed. Key parameters for the growth of single-crystal silicon over oxidized polysilicon gates to form channel regions for stacked devices were obtained. The interface between the buried oxide and the silicon overgrowth was characterized by C-V measurements, exhibiting interface state densities as low as 2×10¹¹/eV-cm² at mid-gap. A self-limiting planarization technique to thin the overgrowth to less than 1 μm to facilitate the implementation of active devices was developed. The quality of the crystalline material and the planarized surface was characterized by means of MOS transistors that exhibited hole mobilities (165 cm²/V-s) comparable to those of bulk material. Field-effect operation of the buried interface composed of the oxidized polysilicon and the overgrowth was demonstrated