• DocumentCode
    995554
  • Title

    The effects of parasitic capacitance on the noise figure of MESFETs

  • Author

    Tehrani, S. ; Nair, V. ; Weitzel, C.E. ; Tam, G.

  • Author_Institution
    Motorola Inc., Phoenix, AZ, USA
  • Volume
    35
  • Issue
    5
  • fYear
    1988
  • fDate
    5/1/1988 12:00:00 AM
  • Firstpage
    703
  • Lastpage
    706
  • Abstract
    The parasitic capacitance due to the gate pad and the gate feed area of a MESFET plays an important role in the low-noise performance of the device. Its effects on the noise figure have been measured and analyzed for π-FET device geometries. It is shown that there is an optimum unit gate width for the minimum noise figure. This optimum unit gate width depends on the device structure and the processing parameters. When the effects of parasitic capacitances are included, H. Fukui´s (1979) equation predicts noise figures that are in good agreement with the experimental data
  • Keywords
    III-V semiconductors; Schottky gate field effect transistors; capacitance; electron device noise; gallium arsenide; semiconductor device models; π-FET device geometries; Fukui equation; GaAs; MESFET; gate feed area; gate pad; low-noise performance; model; noise figure; optimum unit gate width; parasitic capacitance; Bonding; Capacitance measurement; Equations; Feeds; Gallium arsenide; Geometry; MESFETs; Noise figure; Parasitic capacitance; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.2517
  • Filename
    2517