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DocumentCode :

995979

Title :

Systolic multiplier

Author :

Hoekstra, J.

Author_Institution :

Delft University of Technology, Department of Electrical Engineering, Delft, Netherlands

Volume :

Issue :

fYear :

1984

Firstpage :

995

Lastpage :

996

Abstract :

A systolic multiplier based on the shift-and-add algorithm is presented. With this array the minimum possible number of cells is obtained.

Keywords :

cellular arrays; multiplying circuits; cellular arrays; minimum cell number; shift-and-add algorithm; systolic multiplier;

fLanguage :

English

Journal_Title :

Electronics Letters

Publisher :

iet

ISSN :

0013-5194

Type :

jour

DOI :

10.1049/el:19840677

Filename :

4249191

Link To Document :