DocumentCode
996128
Title
Polysilicon transistors fabricated on plasma-deposited amorphous silicon
Author
Ipri, Alfred C. ; Kaganowicz, Grzegorz
Author_Institution
David Sarnoff Res. Center, Princeton, NJ, USA
Volume
35
Issue
5
fYear
1988
fDate
5/1/1988 12:00:00 AM
Firstpage
708
Lastpage
710
Abstract
P-channel MOS transistors were fabricated on plasma-enhanced chemical-vapor deposited (PECVD) amorphous silicon films. The films were deposited at temperatures of 425, 450, and 475°C and crystallized at 600°C. Film thicknesses were between 50 and 250 nm. Transistors were also fabricated on 150-nm-thick low-pressure chemical-vapor-deposited (LPCVD) amorphous silicon films deposited at 560°C. A comparison of device characteristics using 150-nm-thick PECVD and LPCVD films shows that the PECVD films deposited at 425°C produced devices with a factor-of-two-higher hole mobility, a factor-of-1.5-lower subthreshold slope, and a factor-of-3.5-higher on-off current ratio. For all film thicknesses tested there was an increase in the hole mobility and on-off current ratio as the PECVD film temperature was decreased
Keywords
CVD coatings; carrier mobility; elemental semiconductors; insulated gate field effect transistors; plasma deposited coatings; silicon; 425 degC; 450 degC; 475 degC; 50 to 250 nm; 560 degC; 600 degC; Al-SiO2-Si; LPCVD; PECVD; amorphous Si films; film thickness; hole mobility; on-off current ratio; p-channel MOST; plasma deposition; polysilicon transistors; subthreshold slope; Amorphous materials; Amorphous silicon; Chemicals; Crystallization; MOSFETs; Plasma chemistry; Plasma devices; Plasma properties; Plasma temperature; Semiconductor films;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.2519
Filename
2519
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